IIT Patna PHASE-2026 Workshop | Hybrid Workshop on PLL-Based Frequency Synthesizers
Hybrid
Overview
The workshop is organized by the Department of Electrical Engineering and sponsored by SERB, Government of India.
Workshop Details
- Workshop Name: PHASE-2026
- Full Title: PLL-Based Frequency Synthesizers for High-Speed Data Converters and 5G/6G Communication Systems
- Organizer: Department of Electrical Engineering, Indian Institute of Technology Patna
- Sponsor: Science and Engineering Research Board
- Mode: Hybrid (Online + Offline)
Important Dates
- Workshop Dates: 28–29 May 2026
- Duration: 2 Days
Venue
- NKN Room – 407, Block IX
- IIT Patna Campus
- Patna
Topics Covered
Participants will learn about:
- Designing Classical PLLs
- Subsampling PLLs and Applications
- CMOS VCO Design using Cadence
- Frequency Synthesizers for High-Speed Data Converters
- 5G / 6G Communication System Applications
Speakers
Sessions will be delivered by:
- Experts from IITs
- Industry Professionals
- Researchers in Communication and Semiconductor Technologies
Registration Fee
| Mode | Fee |
|---|---|
| Physical Participation | ₹1000 |
| Online Participation | ₹700 |
Physical Mode Benefits
- Accommodation Provided
- Food Arrangements Available
- Limited Seats
Who Can Apply?
Suitable for:
- B.Tech / M.Tech Students
- PhD Scholars
- Researchers
- Faculty Members
- Electronics & Communication Professionals
- Communication Enthusiasts
Contact
- Coordinator: Madan Kumar Jha
- Email: madan_2411ee23@iitp.ac.in
Official Website: https://iitp.ac.in/
Source: https://docs.google.com/forms/d/e/1FAIpQLScYe-CZvj6fSjc4EOgGXLLH6n2_tHuLS_wlnCRJHjPzk-LrKw/viewform
Streams
Science
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